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SiliconANGLE AI · 2026/8/3 22:33:27
Netflix co-founder backs $312M round for optical inference appliance maker Olix

Netflix co-founder backs $312M round for optical inference appliance maker Olix

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Netflix联合创始人重金押注一家名为Olix的AI硬件初创公司,豪掷3.12亿美元融资,公司估值飙升至33亿美元。这家公司正在研发一种专为大模型“解码”阶段设计的芯片,能让AI回答问题的速度更快、能耗更低,相当于给AI装上了“涡轮增压器”。 传统显卡处理AI问题时,需要频繁在外部内存和芯片之间搬运数据,既慢又费电。Olix的DX-1芯片则把模型数据直接塞进芯片内部的“快存”里,省去了来回搬数据的过程,配合用光信号传输数据的“光管线”,整个推理过程就像在高速公路上一路狂飙。这就像以前从书房拿资料要来回跑,现在直接把资料摊在桌面上,效率自然翻倍。 这项技术若落地,最直观的影响是AI应用会变得更快、更便宜。云服务商成本降低后,普通用户使用ChatGPT这类工具的订阅费可能下降,手机上的AI助手响应也会更跟手。更长远看,低功耗的AI推理能力会让更多智能设备“离线思考”,不必事事上传云端,隐私保护和能耗问题都将得到改善。
UPDATED 18:33 EDT / AUGUST 03 2026 AI Netflix co-founder backs $312M round for optical inference appliance maker Olix by Maria Deutscher Artificial intelligence hardware startup Olix Computing Ltd. today announced that it has raised $312 million in funding. The Series C round included contributions from Arm Holding plc, Netflix Inc. co-founder Reed Hastings and several others. Olix is now valued at $3.3 billion, about triple what it was worth after its previous raise in February. When a large language model receives a prompt, it turns the text into a collection of mathematical values called a KV cache. It then uses the KV cache to generate a prompt response. The latter phase of the inference workflow is known as the decode stage. London-based Olix is developing a chip called the DX-1 that is specifically optimized for decode workloads. It plans to ship the DX-1 as part of a data center appliance known as the X-1. According to Olix, the chips inside the system will be linked together using an optical interconnect that transmits data as light. The KV cache that an LLM uses during the decode phase of inference is often larger than the model. As a result, it can’t fit in the underlying chip’s internal SRAM memory. Graphics cards address the challenge by offloading the KV cache to off-chip HBM memory. HBM is slower than SRAM but can hold more data.  Existing decode-optimized processors such as Nvidia Corp.’s Groq 3 LPX take a different approach. They feature a significantly larger pool of on-chip SRAM memory than standard graphics cards. The SRAM pool is large enough to store KV caches on-chip, which removes the need for off-chip HBM memory. Olix hinted in a blog post published today that its DX-1 chip takes a similar approach. According to the company, it doesn’t contain any HBM memory or the advanced packaging used to integrate HBM modules with graphics cards. Olix stated that the DX-1 “holds a model in fast on-chip memory, SRAM, for higher energy efficiency and lower latency.” The company plans to ship the chip as part of a data center appliance called the X-1. Olix says that the processors in the system will be linked together by a slow and wide optical interconnect. Historically, data center operators used copper wires to link together chips in racks. Optical interconnects provide better performance because light travels through glass faster than electrons through metal. Typically, an optical interconnect comprises a relatively small number of high-speed data channels that each shuffle information-carrying light beams between two chips. The slow and wide design used by Olix works differently. Instead of a few high-speed channels, it features a large number of slower channels, hence the name. The speed difference between the two implementations stems from the way they encode data into light beams. A traditional optical interconnect with a handful of high-speed channels encodes data into light using a technology called PAM4. The technology’s speed comes at the expense of reliability. In many cases, optical interconnects must use chips called digital processors to remove the errors that find their way into PAM4-encoded data. Slow and wide interconnects use a less performant but more reliable encoding method called NRZ. It’s less prone to errors than PAM4, which removes the need for digital signal processors and thereby avoids the associated costs. The technology also helps mitigate hardware failures. When an interconnect contains a large number of channels, a localized malfunction in one of them has limited impact on the host sysem. Olix says that its DX-1 chip enables LLMs with 100 billion parameters to process more than 10,000 t
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